The present invention relates to a semiconductor device.
With the recent integration of semiconductor devices, the reduction of the area occupied by the semiconductor device is desired.
Japanese Unexamined Patent Publication No. Hei 11 (1999)-103058 describes the following semiconductor device. A trench (groove portion) is formed on the surface of an N-type high resistance layer. A gate electrode is embedded in the trench through a gate insulating film. In this way, the area of a channel can be increased with the device area unchanged. As a result, it is possible to reduce the ON resistance.